This page under development.
See https://patentscope.wipo.int/search/en/detail.jsf?docId=WO2026161791
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Author: Erik
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GOMAC 2026
Zettaflops LLC, SkyWater Technologies, Synopsys, and Whiteley Research made a presentation GOMACTech 2026 “Beyond the Noise” New Orleans, LA March 9 – 12, 2026.
The paper appears below for reference. GOMAC does not make all paper available publicly, but this paper is not restricted (distribution statement A), so we can post it here.
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JJ 2025
The file below is a slide deck presented at the USC4SCE “JJ” workshop in Santa Fe, NM on April 10, 2025.
Zettaflops LLC technical report ZF013 (below and on arXiv https://arxiv.org/pdf/2504.09229) further elaborate on the material in the presentation.
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WOLTE 2024
Erik attended WOLTE 2024. Erik was also the conference chair.
My slide deck appears below (as a PowerPoint with notes). Notably, I ignored the diagrams on slide 19 and improvised a use case for cryo CMOS quantum control. You should be able to view the pdf using the WordPress viewer, but there is a download button at the bottom as well:
This page is currently a work in progress. I will remove this note when I’m done.
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ComET 2023
Zettaflops.org was mentioned at the Texas Symposium on Computing with Emerging Technologies (ComET), October 30, 2023.
Michael Frank of Sandia asked me for a slide based on material at WOLTE 2022 and documented in detail in technical report ZF10. Mike presented the slide below, followed by the PowerPoint notes text. Mike asked me to put the slide online so it could be referenced:
PowerPoint source:
Narrative:
Upper left: Reversible transistor circuits, such as 2LAL or Q2LAL, in a cryostat would naturally have their power supply located at room temperature. In CMOS, all the energy flowing into the cryostat is turned into heat, but with reversible circuits most of the energy would flow back into the power supply. Energy would leave the cryostat with minimal losses instead of adding the 250x – 1000x overhead of a cryocooler. This means a cryogenic reversible transistor system created without needing resonators or an energy recycling power supply (hence actionable now). This method cannot exceed the cryocooler’s overhead factor, which would limit it to around 100x for 4 K operation.
Lower left: The lower left diagram is similar to one in the arXiv paper cited. Superconducting/transmon qubits have measurement times of around 1 μs, which implies the control system cannot be asked to make a decision in less than that time. A state machine with a ~1 MHz clock would be adequate. A slower clock would require complex architectural tricks similar to branch prediction. A faster clock would require less energy efficient classical electronics and would not increase the quantum computer’s throughput (because the throughput is determined by the qubits and all the classical electronics need to do is keep up). 1 MHz operation is well over 100x slower than room temperature CMOS and 4 K is often suggested for control electronics, so this and the previous two paragraphs suggest the method is actionable today.
Upper right: So, the baseline reversible logic controller would be a state machine whose function is to output tones – illustrated as a flow chart with musical measures as the boxes. Decisions would come from a room temperature decoder for error correction syndromes. The citation shows how to convert an error correction algorithm into a reversible circuit by substituting reversible circuit schematics into the flow chart – repurposing the lines of the flowchart as wires. Zettaflops, LLC has a layout of the test architecture shown. The circuits has not been fabbed; that is the next step.
Lower right: Zettaflops, LLC has a prototype layout for efabless ChipIgnite. The layout has not been fabbed yet. Some portion of the IP is expected to be made available as open source. Interested parties are encouraged to contact Zettaflops, LLC.
The following are additional references:
- An outlook on real-time decoding: https://arxiv.org/abs/2303.00054
- Real-time decoding implementation: https://arxiv.org/abs/2309.05558
- A parallelizable approach: https://arxiv.org/abs/2209.08552
- As stated at the top of this page, see also technical report ZF10
Erik DeBenedictis and Elie Track presented at the IEEE International Conference on Rebooting Computing (ICRC 2022) 8-9 December 2022 in San Francisco, CA, USA and Virtual.
The paper has been published as:
DeBenedictis, Erik P., and Elie K. Track. “Rebooting Quantum Computing.” 2022 IEEE International Conference on Rebooting Computing (ICRC). IEEE, 2022. DOI: 10.1109/ICRC57508.2022.00010.
Accepted Manuscript:
PowerPoint
This is the PowerPoint deck as presented in pdf. This is followed by the source .pptx file (the file was created in .ppt and saved as .pptx).
And this is the slide deck in notes mode, minus one slide.
References from the paper
For convenience, the references from the paper appear below with hyperlinks where available. There is a second open link in some cases.
- Neven, Harmut, “Quantum AI Update,” Google Symposium 2022, offset 15:00. https://eventsonair.withgoogle.com/events/qss-2022 (note: this link requires registration).
- Expanding the IBM Quantum roadmap to anticipate the future of quantum-centric supercomputing, https://research.ibm.com/blog/ibm-quantum-roadmap-2025.
- Pellerano, Stefano, et al. “Cryogenic CMOS for Qubit Control and Readout.” 2022 IEEE Custom Integrated Circuits Conference (CICC). IEEE, 2022. DOI: https://doi.org/10.1109/CICC53496.2022.9772841 https://pure.tudelft.nl/ws/portalfiles/portal/122719163/Cryogenic_CMOS_for_Qubit_Control_and_ReadoutTaverne.pdf.
- Frank, David J., et al. “A Cryo-CMOS Low-Power Semi-Autonomous Qubit State Controller in 14nm FinFET Technology.” 2022 IEEE International Solid-State Circuits Conference (ISSCC). Vol. 65. IEEE, 2022. DOI: https://doi.org/10.1109/ISSCC42614.2022.9731538.
- Fellous-Asiani, Marco. The resource cost of large scale quantum computing. Diss. Université Grenoble Alpes 2022. https://arxiv.org/abs/2112.04022v2.
- Fellous-Asiani, Marco, et al. “Optimizing resource efficiencies for scalable full-stack quantum computers.” arXiv preprint arXiv:2209.05469 (2022). https://arxiv.org/abs/2209.05469v1.
- Frontier to Meet 20MW Exascale Power Target Set by DARPA in 2008 https://www.hpcwire.com/2021/07/14/frontier-to-meet-20mw-exascale-power-target-set-by-darpa-in-2008/.
- Feynman, Richard P. “Simulating physics with computers.” International Journal of theoretical physics 21.6/7 (1982).
- Fredkin, Edward, and Tommaso Toffoli. “Conservative logic.” International Journal of theoretical physics 21.3-4 (1982): 219-253.
- Younis, Saed G. Asymptotically Zero Energy Computing Using Split-Level Charge Recovery Logic. Diss. Massachusetts Institute of Technology, 1994. https://dspace.mit.edu/handle/1721.1/7058.
- Lim, Joonho, Dong-Gyu Kim, and Soo-Ik Chae. “nMOS reversible energy recovery logic for ultra-low-energy applications.” IEEE Journal of Solid-State Circuits 35.6 (2000): 865-875. DOI: https://doi.org/10.1109/4.845190 https://s-space.snu.ac.kr/bitstream/10371/16274/1/nMOS%20reversible%20energy%20recovery%20logic%20for%20ultra-low-energy%20applications.pdf.
- Pauka, S. J., et al. “A cryogenic CMOS chip for generating control signals for multiple qubits.” Nature Electronics 4.1 (2021): 64-70. DOI: https://doi.org/10.1038/s41928-020-00528-y.
- DeBenedictis, Erik P. “Adiabatic circuits for quantum computer control.” 2020 International Conference on Rebooting Computing (ICRC). IEEE, 2020. https://doi.org/10.1109/ICRC2020.2020.00004 https://debenedictis.org/erik/CATC/Log_Shift_Reg_v1.02.pdf.
- DeBenedictis, Erik P. “Classical Reversible Logic Circuits for Quantum Computer Control,” Zettaflops, LLC Technical Report ZF010. https://debenedictis.org/erik/CATC/MgtECompZF010v3.pdf.
- Hornibrook, J. M., et al. “Cryogenic control architecture for large-scale quantum computing.” Physical Review Applied 3.2 (2015): 024010 DOI: https://doi.org/10.1103/PhysRevApplied.3.024010 https://arxiv.org/abs/1409.2202.
- DeBenedictis, Erik P. Managing Energy in Computation with Reversible Circuits. Patent Application No. WO2022197556. September, 2022. https://patentscope.wipo.int/search/en/detail.jsf?docId=WO2022197556.
- Sirois, Adam J., et al. “Josephson microwave sources applied to quantum information systems.” IEEE Transactions on Quantum Engineering 1 (2020): 1-7. DOI: https://doi.org/10.1109/TQE.2020.3045682.
- Jokar, Mohammad Reza, et al. “DigiQ: A Scalable Digital Controller for Quantum Computers Using SFQ Logic.” 2022 IEEE International Symposium on High-Performance Computer Architecture (HPCA). IEEE, 2022. DOI: https://doi.org/10.1109/HPCA53966.2022.00037 https://arxiv.org/abs/2202.01407.
Erik DeBenedictis attended the Quantum Resource Estimation conference on June 18, 2022. This page has is the slide decks that were presented and two additional documents.
Talk on low energy control
Talk on IEEE standards
Additional information
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WOLTE 2022
Erik DeBenedictis attended the conference June 6-9 2022 virtually. The presentation is below.
Additional information
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Adiabatic Analysis Software
The zip files below comprise the AA (Adiabatic Analysis) ngspice software. The software is licensed under Apache 2.0. There is no repository for changes at this time.
Version of 3:05 PM 3/13/2022
This release comprises eight .cir files. Installation instructions are in comments towards the end of aa.cir.
Supports multiple devices:
- (MD=2) Compatibility check with e.cir, which uses the built-in BSIM3 model with default parameters.
- (MD=3) Built-in BSIM3 model with default parameters.
- (MD=4) BSIM4 test modelcards from the ngspice distribution. You must manually move the modelcard files; see comments in aa.cir.
- (MD=5) Sky130. You must install the Sky130 PDK and “uncomment” some lines.
- (MD=6) [undisclosed SOI]. Not for general use at this time.
Supports the following circuits:
- Q2LAL shift registers
- S2LAL shift registers
- Two versions of a quantum computer controller based on Q2LAL
- A CMOS work alike for one of the quantum computer controllers
Learning about the code and regression testing:
- Running aa.cir with no modifications will produce the same output as running e.cir. This is a regression test.
- The top of aa.cir contains a series of control lines of similar format. For purposes of identification, they start with *.param or .param. All but one of these lines should be commented out, meaning the one that is not commented out will control the run.
- Each run will produce some plots and append a summary line to Adia.csv and CMOS.csv. (The current version of this software also appends a second line with the simulation run time.) You can open .csv files with Excel.
- Summary lines have been incorporated into aa.cir immediately following the .param line that controlled run, forming another type of regression test. The summary lines include the energy dissipated during initialization and the remainder of the simulation run. If your run’s dissipation is the same (to five decimal places) as the one incorporated in aa.cir, the software is probably running correctly.
- The summary lines in aa.cir have been manually edited so the last field contains the time and date of the run, the run time in seconds, and the name of the computer in the developer’s office that executed the run.
- The scripts in this software are intended to be changed by the user. Some friendly advice is to run regression tests frequently and keep a lot of backup files because ngspice scripts are hard to debug.
The following zip file contains password-protected files for the convenience of the developer. You should not need these files because they are available on the Internet.
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ISRDS 2021
In support of a my presentation “Adiabatic Circuits for Quantum Computer Control” at ISRDS 2021, I am linking:
Slide deck I used at ISRDS 2021. Alt. source slide deck
Paper on Quiet 2-Level Adiabatic Logic. Alt. source Quiet 2-Level Adiabatic Logic
Energy Management for Adiabatic Circuits, the “main paper” from which this was all derived. Alt source Energy Management for Adiabatic Circuits