db _staging

CATC

A Memory Option for Quantum Computer Control: Cryogenic Adiabatic Transistor Circuits

Post author By Erik
Post date November 7, 2019

Presentation at JJ workshop 2019.

PDF slide deck https://itrs.org/ar/CATC/JJ%20CATC%20v6.pdf Alt. source /ar/CATC/JJ%20CATC%20v6.pdf

PowerPoint https://itrs.org/ar/CATC/JJ%20CATC%20v6.pptx Alt. source /ar/CATC/JJ%20CATC%20v6.pptx