This research is a continuation of an ongoing collaboration between AFRL Space Vehicles and the NSF Center for High-Performance Reconfigurable Computing (CHREC) at the University of Florida. Travis Wise will also be working on this project.

Due to harsh and inaccessible operating environments, space computing presents many unique challenges with respect to stringent power, reliability, and programmability constraints that limit on-board processing performance and mission capabilities. However, the increasing need for real-time sensor and autonomous processing, coupled with limited communication bandwidth with ground stations, are increasing the demand for high-performance, on-board computing for next-generation space missions. Since currently available radiation-hardened space processors cannot satisfy this growing demand, research into various processor architectures is required to ensure that potential new space processors are based on architectures that will best meet the computing needs of space missions. To enable this research, both device metrics and device benchmarking are being used to analyze processor architectures for space computing. Device metrics involves the study of theoretical capabilities of processors based on vendor-supplied data and tools, and enables the study of a broad and diverse set of architectures. Device metrics data comparing radiation-hardened and commercial processors will be presented. Device benchmarking involves the experimental study of realizable capabilities of processors by developing code and optimizing for targeted architectures. Some preliminary results of device benchmarking will be presented based on key applications of importance for next-generation space missions. This research is intended to generate new data for insight into the effects of processor architectures on space missions and increase capabilities for future research.

Document date June 6, 2014.