Guiding Questions

Cross Cutting Themes:

• Power
• Parallelism
• Performance
• Execution Models
• Efficiency
• Cost
• Reliability
  
  

Applications and Algorithms
Chair: Horst Simon
Co-Chair: Mark Stalzer

Strategic Issues:

• Application drivers for Exascale and potential Science impact
• Application system resource requirements
• Algorithmic approaches to exploit Exascale system capability and structures

Detailed Questions:

• What will be important end-user applications requiring Exascale computing?
• What will be the needed memory capacity to support the range of Exascale applications?
• How much parallelism can be exposed for these applications and is it enough to exploit billion-way parallelism architectures?
• What are the expected I/O demands for mass storage including checkpoint/restart, initial conditions, intermediate results for runtime steering, and final results?
• What are the requirements for and possibilities of algorithms suitable for Exascale applications?
• For Exascale applications and their enabling algorithms what semantic constructs, basic mechanisms, and execution model attributes are needed?
• What discoveries or advances might be possible with Exascale computing that are not possible with Petascale or below. Also, what advances will be possible by applying Exascale-capable technology to smaller systems (i.e., robots, spacecraft)?
• What algorithm classes will become more or less important at Exascale as opposed to Petascale or lower. For example, will finite elements become more or less prevalent? How about Monte Carlo? Will larger computers be applied to larger simulations or large parameter sweeps over current-size simulations? While we’re on the topic, will simulations be the prevalent application class for Exascale supercomputers?

Enabling Technologies
Chair: Sheila Vaydia
Co-Chair: Erik Debenedictis

Strategic Issues:

• Limitations of conventional semiconductor and wired technologies and roadmaps in achieving Exascale computing – hence the need for alternatives
• Promising device technology innovations in logic, primary and secondary storage, and interconnect
• Nano-scale technology approaches and end of Moore’s Law
• Over the horizon concepts

Detailed Questions:

• What are achievable clock rates or switching times at reasonable power consumption of competing logic technologies?
• What are the contending technologies that will lead to nano-scale and the end of Moore’s law?
• What are the likely paths to intra-system communications including chip-to-chip and system-wide interconnections?
• If memory capacity will be one of the major constraining factors to application performance, what are the likely technologies and their operational characteristics towards Exascale and beyond?
• Is there life after disks? With the monotonically and potentially exponential growth in storable information, what is the likely or potential media technologies that will get us through the 21st century?
• What information processing structures may come to offer advantage over Boolean logic gates. Example: alternatives circuits, non charge-based information, quantum effects, ...
• Is there a future in systems that blend information processing and non-volatile memory? Examples may include artificial neural networks and molecular-scale FPGAs where the same physical structures learn at a low speed and process at a higher speed.
• How should quantum computing be integrated with the general information processing? What about quantum effects short of a traditional quantum computer?

Parallel Architectures
Chair: Larry Bergman
Co-Chair: Loring Craymer

Strategic Issues:

• Exploitation of emerging technologies
• Scalability to billion-way parallelism
• Addressing sources of performance degradation
• Usability

Detailed Questions:

• What architecture strategies will enable Exascale system implementation?
• What architecture approaches will address challenges of latency, overhead, contention, and starvation expected at Exascale system structures?
• It is estimated that multi billion-way parallelism (> 100 million cores) will be required for Exascale systems. What architectures can be expected to deliver, exploit, and coordinate such unprecedented parallelism?
• What architecture techniques will minimize power consumptions?
• Are new execution models required to guide architecture structure and operations, and if so what?
• In the new Exascale architectures, how will memory and address spaces be handled?
• Will the future hold more highly parallel traditional architectures or something new. To be specific, the traditional architecture is a homogeneous parallel system comprising x86-compatible processors with MMU and a large cache. Something new might be a heterogeneous system of heavy and light cores, where the light cores are GPUs, cell, attached neural networks, etc.

System Software and Programming Environments
Chair: Ron Brightwell
Co-Chair: Jeff Vetter

Strategic Issues:

• Advanced execution models
• Parallel programming models, methods, and tools
• Resource management, allocation, and scheduling
• Mass storage and I/O management

Detailed Questions:

• What new semantic constructs and execution models will be needed by Exascale applications and algorithms? What will the programming languages of the future look like?
• How will programmers contend with billion-way parallelism? What will the new languages look like?
• What operating system organizing strategy will effectively manage 100 million or more processing cores efficiently and reliably?
• How will compilers and runtime systems support the new classes of applications dominated by dynamic meta data structures?
• What will be the balance in the future between user direct control of resources and system automation for ease of use?
• Will programmers continue to program with arithmetic statements, or may a different paradigm become prevalent? Examples, neural networks, fuzzy logic, graph algorithms, image processing, real time?